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c boot q 1 v dc s 1 d 2 v dd in undervoltage gnd q 2 ? + v dd level shift out l out h sd v bbm boot d1 v s SI9912 vishay siliconix new product document number: 71311 s-02882?rev. a, 21-dec-00 www.vishay.com 1 dual mosfet bootstrapped driver with break-before-make

4.5- to 5.5-v operation undervoltage lockout 250-khz to 1-mhz switching frequency shutdown quiescent current <5 a one input pwm signal generates both drive bootstrapped high-side drive operates from 4.5- to 30-v supply ttl/cmos compatible input levels 1-a peak drive current multiphase desktop cpu supplies single-supply synchronous buck converters mobile computing cpu core power converters standard-to-synchronous converter adaptations high frequency switching converters

the SI9912 is a dual mosfet high-speed driver with break-before-make. it is designed to operate in high frequency dc-dc switchmode power supplies. the high-side driver is bootstrapped to handle the high voltage slew rate associated with ?floating? high-side gate drivers. each driver is capable of switching a 3000-pf load with 60-ns propogation delay and 25-ns transition time. the SI9912 comes with an internal break-before-make feature to prevent shoot-through current in the external mosfets. a shutdown pin is used to enable the driver. when disabled, the quiescent current of the driver is less than 5 a. the SI9912 is available in an 8-pin soic package for operation over the industrial operation range (?40 c to 85 c).

v s sd in v outl v outh l l l l l l l h l l l h l h l l h h l h h l l l l h l h l l h h l l l h h h l h
SI9912 vishay siliconix new product www.vishay.com 2 document number: 71311 s-02882 ? rev. a, 21-dec-00

parameter symbol limit unit low side driver supply voltage v dd 7.0 input voltage on in v in ? 0.3 to v dd +0.3 shutdown pin voltage v sd ? 0.3 to v dd +0.3 v bootstrap voltage v boot 35.0 high side driver (bootstrap) supply voltage v boot ? v s 7.0 operating junction temperature range t j ? 40 to 125 storage temperature range t stg ? 40 to 150 c power dissipation (note a and b) p d 830 mw thermal impedance ja 125 c/w lead temperature (soldering 10 sec) 300 c notes a. device mounted with all leads soldered to p.c. board b. derate 8.3 w/ c above 25 c stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.

parameter symbol limit unit bootstrap voltage (high-side drain voltage) v boot 4.5 to 30 logic supply v dd 4.5 to 5.5 v bootstrap capacitor c boot 100 n to 1 f ambient temperature t a ? 40 to 85 c

test conditions unless specified limits parameter symbol v dd = 4.5 to 5.5 v v boot = 4.5 to 30 v, t a = ? 40 to 85 c min typ max unit power supplies v dd supply v dd 4.5 i dd supply i dd1(en) sd = h, in = h, v s = 0 v 1000 i dd supply i dd2(en) sd = h, in = l, v s = 0 v 500 i dd supply i dd3(dis) sd = l, in = x, v s = 0 v 5 a i dd supply i dd4(en) sd = h, in = x, v s = 25 v, v boot = 30 v 200 i dd supply i dd5(dis) sd = l, in = x, v s = 25 v, v boot = 30 v 5 i dd(en) f in = 300 khz, sd = high, driving 2 x si4412dy 9 ma i dd supply i dd(dis) f in = 300 khz, sd = low, driving 2 x si4412dy 3 a boot strap current i boot v boot = 30 v, v s = 25 v, v outh = high 0.9 3 ma reference voltage break-before-make reference voltage v bbm 1.1 3 v logic inputs (sd , in) input high v ih 0.7 v dd v dd + 0.3 input low v il ? 0.3 0.3 v dd v undervoltage lockout v dd undervoltage v uvl v dd rising 3.7 4.3 v dd undervoltage hysteresis v hyst 0.4 v
SI9912 vishay siliconix new product document number: 71311 s-02882 ? rev. a, 21-dec-00 www.vishay.com 3

test conditions unless specified limits parameter symbol v dd = 4.5 to 5.5 v v boot = 4.5 to 30 v, t a = ? 40 to 85 c min typ max unit bootstrap diode diode forward voltage vf d1 forward current = 100 ma 0.8 1 v output drive current out h source current i out(h+) v boot ? v s = 3.7 v, v outh ? v s = 2 v ? 0.4 out h sink current i out ( h ? ) v boot ? v s = 3.7 v, v outh ? v s = 1 v 0.4 out l source current i out(l+ ) v dd = 4.5 v, v outl = 2 v ? 0.4 a out l sink current i out(l ? ) v dd = 4.5 v, v outl = 1 v 0.6 timing (c load = 3 nf) out l off propagation delay t pdl(outl) 30 out l on propagation delay t pdh(outl) v dd = 4.5 v 20 out h off propagation delay t pdl(outh) 30 out h on propagation delay t pdh(outh) v boot ? v s = 4.5 v 20 out l turn on time t r(outl) out l = 10 to 90% 25 ns out l turn off time t f(outl) out l = 90 to 10% 25 out h turn on time t r(outh) out h ? v s = 10 to 90% 30 out h turn off time t f(outh) out h ? v s = 90 to 10% 20 notes a. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data s heet. b. typical values are for design aid only, not guaranteed nor subject to production testing.

out h 10% 10% 90% 90% v s out l in 50% 50% t pdh(outl) t f(outl) t pdh(outh) 90% 10% t r(outh) t pdl ( outh) t f(outh) t pdl(outl) t r(outl) 10% 90%
SI9912 vishay siliconix new product www.vishay.com 4 document number: 71311 s-02882 ? rev. a, 21-dec-00

gnd so-8 5 6 7 8 top view 2 3 4 1 out h v s in boot v dd sd out l

pin number name function 1 out h output drive for upper mosfet. 2 gnd ground supply 3 in cmos level input signal. controls both output drives. 4 sd shutdown pin 5 out l output drive for lower mosfet. 6 v dd input power supply 7 boot floating bootstrap supply for the upper mosfet 8 v s floating gnd for the upper mosfet. v s is connected to the buck switching node and the source side of the upper mosfet.

part number temperature range package SI9912dy bulk SI9912dy-t1 ? 40 to 85 c tape and reel eval kit temperature range board type SI9912db ? 40 to 85 c surface mount
driver on switch delay SI9912 tr, tf, tpd driver off switch delay v s out h out l in v s out h out l in SI9912 tr, tf, tpd c l = si4412dy c l = si4412dy
SI9912 vishay siliconix new product document number: 71311 s-02882 ? rev. a, 21-dec-00 www.vishay.com 5

1 1 100 30 1000 10 current (ma) i dd supply current vs. frequency frequency (khz) 10 0.3 10 1 rise and fall times (ns) load capacitance (nf) t r(outh) t r(outl) t f(outh) rise and fall time vs. c load 3 50 40 30 20 10 0 0 1 2 3 4 5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 ? 5 ? 4 ? 3 ? 2 ? 1 0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 output voltage drop (v) v out(h+) vs. supply supply voltage (v) supply voltage (v) 0.0 0.5 1.0 1.5 2.0 2.5 4.0 4.5 5.0 5.5 6.0 ? 6 ? 5 ? 4 ? 3 ? 2 ? 1 0 4.0 4.5 5.0 5.5 6.0 v out(h?) vs. supply v out(l+) vs. supply v out(l?) vs. supply supply voltage (v) supply voltage (v) output voltage drop (v) output voltage drop (v) output voltage drop (v) 0.5 a 1 a 1.5 a 0.5 a 1 a 1.5 a 2 a 0.5 a 1 a 1.5 a 2 a 0.5 a 1 a 1.5 a 2 a t f(outl)
SI9912 vishay siliconix new product www.vishay.com 6 document number: 71311 s-02882 ? rev. a, 21-dec-00

0 1 2 3 4 5 ? 50 ? 25 0 25 50 75 100 ? 5 ? 4 ? 3 ? 2 ? 1 0 ? 50 ? 25 0 25 50 75 100 output voltage drop (v) v out(h+) vs. t emperature temperature ( c) 0.0 0.5 1.0 1.5 2.0 ? 50 ? 25 0 25 50 75 100 ? 5 ? 4 ? 3 ? 2 ? 1 0 ? 50 ? 25 0 25 50 75 100 v out(h ? ) vs. t emperature v out(l+) vs. t emperature v out(l ? ) vs. t emperature output voltage drop (v) output voltage drop (v) output voltage drop (v) 0.5 a 1 a 0.5 a 1 a 1.5 a 2 a 0.5 a 1 a 1.5 a 2 a 0.5 a 1 a 1.5 a 2 a temperature ( c) temperature ( c) temperature ( c)
break-before-make function the SI9912 has an internal break-before-make function to ensure that both high-side and low-side mosfets are not turned on at the same time. the high-side drive (out h ) will not turn on until the low-side gate drive voltage (measured at the out l pin) is less than v bbm , thus ensuring that the low-side mosfet is turned off. the low-side drive (out l ) will not turn on until the voltage at the mosfet half-bridge output (measured at the v s pin) is less than v bbm , thus ensuring that the high-side mosfet is turned off. under voltage lockout function the SI9912 has an internal under-voltage lockout feature to prevent driving the mosfet gates when the supply voltage (at v dd ) is less than the under-voltage lockout specification (v uvl ). this prevents the output mosfets from being turned on without sufficient gate voltage to ensure they are fully on. there is hysteresis included in this feature to prevent lockout from cycling on and off.

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